Returning to this point from one of my earlier questions....
I can see this here,jbelanger wrote: All 24 ADC ports are available and the logger board actually uses 13 of them: 8 for EGT, 3 for the accelerometer, 1 for 12V and 1 for 3.3V. Those are also hardcoded in the code but can be used with the IOx-OEM.
1 - When you say they are "hardcoded", what does that actually mean ? Does it mean they are permenantly associated with defined CPU ports (which you have hardwired on your EGT board), or somthing else ?
Then, when I asked if the remaining (ie, beyond the ADC 0-7) could still be used you also said,
Now does this mean, for example, that ADC channels 8,9,10,11 can only be logged as EGT data and cannot be displayed ? Also, when logged will they be fixed with the title of EGT ?jbelanger wrote: The only way to collect data for the remaining 16 ADC channels is to do a datalog of the IOx data. I'll have to see if the data between the 2 devices can be correlated in TS and/or MLV. But TS does collect the data on all the CAN devices in a project (actually, that can be disabled now).
The reason for asking is that on my carrier board, I have "hardwired" it as far as possible using exactly the same CPU ports as you use on the full size IOx (to avoid confusion) as follows,
Trying to ignore the difference between numbering (1-8 = 0-7 depending on where you look......)
Six generic analogue inputs wired as per your ADC 1-6, same CPU ports as per the table (ie, wired to ADP10, ADP19, etc.)
The CPU ports you would have had wired to ADC 7 and 8 left unconnected so ADC 7 and 8 can be allocated for Innovate dual wideband.
Three generic medium current outputs wired as per your Hout 4,5,6 (ie, wired to PTD1, PTL0, PTG4)
Now for the confusion.....
I have added four more analogue inputs, hardwired for temperature only (uses less parts than providing the "generic" option) and,
a - I would like to allocate them to ADCs 9 - 12 (8 - 11 in the screenshot) basically becuase you only have three remaining spare numbers, not four.
b - I would like to use other ports simply for board layout.
What I'm unclear about is whether I have to use the same physical ports as you use for EGTs 1 - 4 because of this "hardcoding". I can see others available in TS to allocate to ADCs 9 - 12 but I know you said earlier (somewhere) certain allocations should be grayed out but aren't.
If so, presumably the CPU ports you use on your EGT board are as per the table (ADP 9, 0, 4, 18). If it's possible to use the same ones I will anyway (just to avoid confusion) but I am very limited on board space now. Ideally I would like to use some different ADP ports, but they are allocated different ADC numbers in the table.
Hope that all made sense.
EDIT - to try and make more sense.